CPU Simulator — Von Neumann Architecture

Von Neumann architecture

The same main memory stores program instructions and data. Follow each transfer through the processor.

STORED-PROGRAM MODEL

Central Processing Unit (CPU) processing · control · CPU memory

Processing & Control non-memory components

Control Unit (CU)

coordinates and decodes

CU activity

Waiting for the next processor step.

Interpreting current value as —

Arithmetic Logic Unit (ALU)

arithmetic and logical operations

ALU activity

Idle — no arithmetic operation

CPU Memory very fast storage

ACC

Accumulator

working value / result

MAR

Memory Address Register

address currently being accessed

—

Program Counter

address of next instruction

MDR

Memory Data Register

instruction / data being transferred

—

Cache

CPU memory

empty

Address bus

Data bus

Control bus

Main Memory (RAM) instructions + data

Address	Contents

Stored-program principle: program instructions and data occupy addresses in the same memory.

Instruction Data

Current instruction: not yet fetched

Fetch–Decode–Execute cycle

Current phase READY

FETCH

DECODE

EXECUTE

What is happening

Ready to begin

Choose a program and click Next step. Every register transfer, control signal and ALU operation will be shown explicitly, including whether the Control Unit is treating the current memory value as an instruction or as data.

Micro-operation Press Next step

Teaching point: Watch both the CU and ALU status displays. The ALU is only active when an arithmetic operation is actually required.

Steps for this instruction